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Conference Papers Year : 2021

Overcoming the data deluge challenges with greener electronics


The complete ecosystem of electronic device manufacturers, from microelectronics, software and hardware designers to developers, producers, and integrators, is facing an immense new environmental challenge: to cope with the data deluge and to reduce the energy consumption of digital technologies. The purpose of this paper is to propose scientific and technical directions to reach global data and power sobriety while preserving computational efficiency. We present nine opportunities to lower the power consumption of computing units. A growth factor of 100 to 1000 in energy efficiency is achievable in the next 10 years if we take full advantage of all the potential improvements, working simultaneously at all five levels of the technological ecosystem (process steps, circuits, architecture, software and algorithms). We will indeed need to exploit all the possible technological advances to achieve this goal, including resistive memories, 3D stacking and new computing paradigms such as in-memorycomputing, neuromorphic computing and quantum computing. Additionally, in order to maximize efficiency and performance, the research and development communities must work closer together and embrace a real culture of co-design to optimize applications and algorithms, algorithms and architectures, architectures and technologies jointly. We also propose to perform data processing operations as closely as possible to the source, in order to curtail the energy consumption that comes with data transport. Finally, we believe it is essential to accept the constraints for sustainable electronics now, and to change our mindsets quite radically by carrying out product life-cycle assessments in the very early phases of any new research.
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cea-03759933 , version 1 (22-04-2024)



J.-R. Lequepeys, M. Duranton, S. Bonnetier, S. Catrou, R. Fournel, et al.. Overcoming the data deluge challenges with greener electronics. ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Sep 2021, Grenoble, France. pp.7-14, ⟨10.1109/ESSCIRC53450.2021.9567836⟩. ⟨cea-03759933⟩
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