Normally-OFF 650V GaN-on-Si MOSc-HEMT Transistor: Benefits of the fully recessed gate architecture - Laboratoire d'Electronique et des Technologies de l'Information Accéder directement au contenu
Poster De Conférence Année : 2022

Normally-OFF 650V GaN-on-Si MOSc-HEMT Transistor: Benefits of the fully recessed gate architecture

Cyrille Le Royer

Résumé

In this paper we present a detailed performance status of AlGaN/GaN MOS channel High Electron Mobility Transistors (MOSc HEMTs) with fully recessed gate architecture on 200mm Si substrates. We report a wide range of wafer and package level results. ON state resistance is studied through three aspects: i) RON partitioning with analysis of its four components, ii) RON temperature dependence, iii) cumulative dynamic RON under stress. For accurate power assessment we characterize packaged devices and compare the typical figures of merit (gate charge, switching tests) to state of the art references (especially pGaN gate HEMTs). We highlight the benefits offered by this technology for 650V applications, such as very low IGSS leakage even at 150°C, and better switching performances, td(on), td(off).
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cea-04577370 , version 1 (16-05-2024)

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Cyrille Le Royer, Blend Mohamad, Jérôme Biscarrat, Laura Vauche, René Escoffier, et al.. Normally-OFF 650V GaN-on-Si MOSc-HEMT Transistor: Benefits of the fully recessed gate architecture. ISPSD 2022 - IEEE 34th International Symposium on Power Semiconductor Devices and ICs, May 2022, Vancouver, Canada. 2022, ⟨10.1109/ISPSD49238.2022.9813672⟩. ⟨cea-04577370⟩
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