Hardware accelerator for FIPS 202 hash functions in post-quantum ready SoCs - CEA - Commissariat à l’énergie atomique et aux énergies alternatives Accéder directement au contenu
Communication Dans Un Congrès Année : 2024

Hardware accelerator for FIPS 202 hash functions in post-quantum ready SoCs

Résumé

In today’s digital landscape, cryptography plays a vital role in ensuring communication security through encryption and authentication algorithms. While traditional cryptographic methods rely on hard mathematical problems for security, the rise of quantum computing threatens their effectiveness. Post-Quantum Cryptography (PQC) algorithms, like CRYSTALSKyber, aim to withstand quantum attacks. Recently standardized, CRYSTALS-Kyber is a lattice-based algorithm designed to resist quantum attacks. However, its implementation faces computational challenges, particularly with Keccak-based functions, which are crucial for security and upon which the FIPS 202 standard is based. Our paper addresses this technological challenge by designing a FIPS 202 hardware accelerator to enhance CRYSTALS-Kyber efficiency and security. We chose to implement the entire FIPS 202 standard in hardware in order to widen the applicability of the accelerator to all possible algorithms that rely on such hash functions, taking care to provide realistic assumptions on system-level integration inside a System-on-Chip (SoC). We provide results in terms of area, frequency, and clock cycles for both ASIC and FPGA targets. An area reduction of up to 22.3% is achieved with respect to state-ofthe-art solutions. In addition, we integrated the accelerator inside a 32-bit RISC-V based security-oriented SoC, where we show a strong performance gain on CRYSTALS-Kyber execution. The design presented in this paper performs better in all Kyber1024 primitives, with an improvement up to 3.21× in Kyber-KeyGen.
Fichier principal
Vignette du fichier
Hardware_Accelerator_for_FIPS_202_Hash_Functions_in_Post-Quantum_Ready_SoC-Crescenzo_et_al.pdf (399.72 Ko) Télécharger le fichier
Origine Fichiers produits par l'(les) auteur(s)

Dates et versions

cea-04689662 , version 1 (05-09-2024)

Identifiants

Citer

Diamante-Simone Crescenzo, Rafael Carrera Rodriguez, Riccardo Alidori, Florent Bruguier, Emanuele Valea, et al.. Hardware accelerator for FIPS 202 hash functions in post-quantum ready SoCs. IOLTS 2024 - IEEE 30th International Symposium on On-Line Testing and Robust System Design, Jul 2024, Rennes, France. ⟨10.1109/IOLTS60994.2024.10616067⟩. ⟨cea-04689662⟩
0 Consultations
0 Téléchargements

Altmetric

Partager

Gmail Mastodon Facebook X LinkedIn More