3DIP: An iterative partitioning tool for monolithic 3D IC
Abstract
CoolCubeTM is a monolithic 3D (M3D) technology offering a vertical density of integration 20 times higher than face to face copper hybrid bonding (F2F Cu-Cu), thanks to ultra-thin Monolithic Inter-tier Vias (MIVs). In this work, we propose a new partitioning tool exploiting this characteristic for 2-tier Cell-on-Cell ICs before placement. It is based on a fast and iterative algorithm that explores the space of solutions and minimizes the estimated cost of wires with balanced area between tiers without limiting the number of MIVs. A mathematical formulation of the 3D partitioning problem and a comprehensive framework, based on simulated annealing (SA) algorithm coupled with a dedicated cost function, are detailed and compared with Min-Cut (MC) partitions commonly used. It appears that our solution can decrease the estimated total cost of wires by 41% and 45% for the LDPC and FFT/AES units. It also reduces the total cost of wires by 30% to 44% compared to the MC algorithm for the same units and with no significant increase in runtime.
Keywords
Mathematical formulation
Partitioning problem
Simulated annealing algorithms
Three dimensional integrated circuits
Cost estimating
Cost functions
Costs
Estimation
Functions
Integration
Iterative methods
Monolithic integrated circuits
Simulated annealing
Timing circuits
Wire
3D partitioning
Estimated costs
Hybrid bonding
Iterative algorithm
Iterative Partitioning