A 60 GHz Carrier Recovery Circuit in CMOS 28nm FD SOI for BPSK/QPSK PLL-less High Data Rate Receivers - CEA - Commissariat à l’énergie atomique et aux énergies alternatives
Conference Papers Year : 2023

A 60 GHz Carrier Recovery Circuit in CMOS 28nm FD SOI for BPSK/QPSK PLL-less High Data Rate Receivers

Abstract

This work presents an integrated circuit fabricated in CMOS28nm FDSOI that extracts the carrier frequency of a 60 GHz band BPSK/QPSK modulated signal. The carrier extraction is operated by on chip analog signal processing which removes the modulation and regenerates a pure sine-wave oscillating at the received signal carrier frequency. The circuit consumes 45 mW from a 0.8 V supply. Furthermore, the received high data-rate signal is demodulated using the recovered carrier with an external mixer and a sampling scope without any further digital processing. The circuit shows a carrier recovery and demodulation capability up to 22 Gbps QPSK signal with 20% error vector magnitude (EVM).
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Dates and versions

cea-04750459 , version 1 (23-10-2024)

Identifiers

Cite

Alexandre Siligaris, Cédric Dehos, Jean-Baptiste David, Lea Barrau, José Luis Gonzalez-Jimenez. A 60 GHz Carrier Recovery Circuit in CMOS 28nm FD SOI for BPSK/QPSK PLL-less High Data Rate Receivers. 2023 18th European Microwave Integrated Circuits Conference (EuMIC), Sep 2023, Berlin, Germany. pp.233-236, ⟨10.23919/EuMIC58042.2023.10288990⟩. ⟨cea-04750459⟩
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