Innovative Low-Power Self-Nanoconfined Phase-Change Memory - CEA - Commissariat à l’énergie atomique et aux énergies alternatives Access content directly
Journal Articles IEEE Transactions on Electron Devices Year : 2021

Innovative Low-Power Self-Nanoconfined Phase-Change Memory

Abstract

In this paper, we demonstrate at array level and in industrial like devices, the extreme scaling down to nanometric dimensions of the Phase-Change Memory technology thanks to an innovative Self-Nano-Confined PCM device (SNC PCM). We show how such solution based on an optimized GeN/GeSbTe stack enables programming down to 50 $\mu$A and endurance up to more than 10$^8$ cycles in 4 kb arrays, with the huge advantage of having no dependency on the critical lithography dimension used. We further demonstrate that the high thermal confinement achieved in such extremely confined PCM makes the engineering of the SET pulse becoming fundamental in order to assure a reduced SET resistance drift. Moreover, thanks to physico-chemical analyses and 3D TCAD electro-thermal simulations we demonstrate the Self-Nano-Confined phenomenon, revealing an effective scaling of the PCM down to around 12 nm and how it improves the thermal efficiency of the device thanks to a reduced current density and thermal stress in the system.
Fichier principal
Vignette du fichier
TED_ALSerra_022021_v2.pdf (2.43 Mo) Télécharger le fichier
Origin Files produced by the author(s)

Dates and versions

cea-03119677 , version 1 (25-01-2021)

Identifiers

Cite

Anna Lisa Serra, Gauthier Lefevre, Guillaume Bourgeois, Chiara Sabbione, Niccolo Castellani, et al.. Innovative Low-Power Self-Nanoconfined Phase-Change Memory. IEEE Transactions on Electron Devices, 2021, 68 (2), pp.535-540. ⟨10.1109/TED.2020.3044267⟩. ⟨cea-03119677⟩
78 View
113 Download

Altmetric

Share

Gmail Mastodon Facebook X LinkedIn More