A simple interpolation model for the carrier mobility in Trigate and gate-all-around silicon NWFETs - CEA - Commissariat à l’énergie atomique et aux énergies alternatives Access content directly
Journal Articles IEEE Transactions on Electron Devices Year : 2017

A simple interpolation model for the carrier mobility in Trigate and gate-all-around silicon NWFETs

Abstract

We compute the electron and hole mobilities in Trigate and gate-all-around silicon nanowires (SiNWs) within the nonequilibrium Green’s Function framework. We then derive a simple model for the dependence of the mobility on the SiNW width and height. This model interpolates between the square SiNW and thin film limits. In order to provide a complete description of the mobility in SiNW devices, we calculate the phonon, surface roughness, and remote Coulomb-limited mobilities of square nanowires and of thin films with side or thickness t = 5, 7, and 10 nm. The mobility of arbitrary rectangular SiNWs with width W = t or height H = t can then be reconstructed from these partial mobilities using Matthiessen’s rule. We show that these models successfully reproduce the trends measured on n- and p-type devices with different widths and orientations.
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Dates and versions

cea-01973715 , version 1 (08-01-2019)
cea-01973715 , version 2 (10-01-2019)

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Zaiping Zeng, Francois Triozon, Sylvain Barraud, Yann-Michel Niquet. A simple interpolation model for the carrier mobility in Trigate and gate-all-around silicon NWFETs. IEEE Transactions on Electron Devices, 2017, 64 (6), pp.2485-2491. ⟨10.1109/TED.2017.2691406⟩. ⟨cea-01973715v2⟩
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