With the explosion of advanced power control knobs such as dynamic voltage frequency scaling, mastering energy constraints in embedded systems is becoming challenging for software developers. Several power estimation techniques have been proposed over the past years, from electrical level to more abstract models such as SystemC/TLM. They offer various trade-offs between performance and accuracy, but suffer from a number of shortcomings. They are expensive and time-consuming, requiring intricate models of the architecture and finally, fail to be applied from the software developer perspective. In this paper, we propose a lightweight and cost-effective approach suitable for software developers. It relies on trace analysis and high-level modeling of architectures to perform quick and efficient power consumption estimations without loosing accuracy. This approach is fully supported by a tool and is validated using a simple thermal mitigation case study and checked against physical measurements. We show that, for our case study, the relative error between our tool and real values is 8% in average.