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authFullName_s : Jean-Philippe Noel
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Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization

Roman Gauchi , Valentin Egloff , Maha Kooli , Jean-Philippe Noel , Bastien Giraud , et al.
ISLPED 2020: ACM/IEEE International Symposium on Low Power Electronics and Design, Aug 2020, Boston, MA, United States. pp.121-126, ⟨10.1145/3370748.3406550⟩
Conference papers cea-02963719v1
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Smart Instruction Codes for In-Memory Computing Architectures Compatible with Standard SRAM Interfaces

Maha Kooli , Henri-Pierre Charles , Clément Touzet , Bastien Giraud , Jean-Philippe Noel
Design, Automation and Test in Europe, Mar 2018, Dresde, Germany
Conference papers cea-01757656v1
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RISC V based programming model of a computational SRAM vector processing unit

Maha Kooli , Henri-Pierre Charles , Thaddée Bricout , Jean-Philippe Noel , Maria Ramirez-Corrales , et al.
RiscV Summit Europe 2023, Jun 2023, Barcelone, Spain. , 2023
Conference poster cea-04196778v1
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DRC 2 : Dynamically Reconfigurable Computing Circuit based on Memory Architecture

Kaya Can Akyel , Henri-Pierre Charles , Julien Mottin , Bastien Giraud , Suraci Grégory , et al.
IEEE International Conference on Rebooting Computing, Oct 2016, San Diego, France
Conference papers cea-01376554v1

Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures

Alexandre Levisse , Bastien Giraud , Jean-Philippe Noel , Mathieu Moreau , Jean-Michel Portal
Proceedings of the 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Jul 2016, Beijing, China. pp.7-12, ⟨10.1145/2950067.2950073⟩
Conference papers hal-01435118v1
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Storage class memory with computing row buffer: A design space exploration

Valentin Egloff , Jean-Philippe Noel , Maha Kooli , Bastien Giraud , Lorenzo Ciampolini , et al.
Other publications cea-03605068v1
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Prospects for energy-efficient edge computing with integrated HfO 2-based ferroelectric devices

Ian O'Connor , Mayeul Cantan , Cedric Marchand , Bertrand Vilquin , Bastien Giraud , et al.
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC), Oct 2018, Verona, Italy. ⟨10.1109/VLSI-SoC.2018.8644809⟩
Conference papers hal-01916992v1
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Analysis of Read Port Short Defects in an 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noel , Arnaud Virazel
16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Conference papers lirmm-03990078v1

Towards a truly integrated vector processing unit for memory-bound applications based on a cost-competitive computational SRAM design solution

Maha Kooli , Antoine Heraud , Henri-Pierre Charles , Bastien Giraud , Roman Gauchi , et al.
ACM Journal on Emerging Technologies in Computing Systems, 2022, 18 (2), pp.1-26. ⟨10.1145/3485823⟩
Journal articles cea-04129882v1

Resistive Switching Memory Architecture Based on Polarity Controllable Selectors

Alexandre Levisse , Pierre-Emmanuel Gaillardon , Bastien Giraud , Ian O'Connor , Jean-Philippe Noel , et al.
IEEE Transactions on Nanotechnology, 2019, 18, pp.183-194. ⟨10.1109/TNANO.2018.2887140⟩
Journal articles hal-02060199v1
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Smart Instruction Codes For In-Memory Computing Architectures Compatible With Standard Sram Interfaces

Henri-Pierre Charles , Maha Kooli , Clément Touzet , Bastien Giraud , Jean-Philippe Noel
Other publications cea-01757665v1
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A near-instantaneous and non-invasive erasure design technique to protect sensitive data stored in secure SRAMs

Jean-Philippe Noel , Manuel Pezzin , Jean-Frédéric Christmann , Lorenzo Ciampolini , Mikael Le Coadou , et al.
ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Sep 2021, Grenoble, France. pp. 455-458, ⟨10.1109/ESSCIRC53450.2021.9567885⟩
Conference papers cea-03605067v1
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Improving post-quantum cryptography coupling near-memory computing and RISC-V cores

Maria Ramirez-Corrales , Emanuele Valea , Jean-Philippe Noel
RISC-V Summit Europe, Jun 2023, Barcelone, Spain
Conference papers cea-04137679v1
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SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration

Ivan Miro-Panades , Benoit Tain , Jean-Frederic Christmann , David Coriat , Romain Lemaire , et al.
IEEE Journal of Solid-State Circuits, 2022, pp.1. ⟨10.1109/JSSC.2022.3198505⟩
Journal articles hal-04061172v1
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Analysis of resistive defects on a foundry 8T SRAM-based IMC architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noel , Arnaud Virazel
Microelectronics Reliability, 2023, 147, pp.115029. ⟨10.1016/j.microrel.2023.115029⟩
Journal articles hal-04129470v1
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SneakPath compensation circuit for programming and read operations in RRAM-based CrossPoint architectures

Alexandre Levisse , Bastien Giraud , Jean-Philippe Noel , Mathieu Moreau , Jean-Michel Portal
2015 15th Non-Volatile Memory Technology Symposium (NVMTS), Oct 2015, Beijing, China. ⟨10.1109/NVMTS.2015.7457426⟩
Conference papers hal-01745689v1
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Software Platform Dedicated for In-Memory Computing Circuit Evaluation

Maha Kooli , Henri-Pierre Charles , Clément Touzet , Bastien Giraud , Jean-Philippe Noel
RSP'17 (Rapid System Prototyping), Oct 2017, Séoul, South Korea. ⟨10.1145/3130265.3130322⟩
Conference papers cea-01625320v1
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High-Density 4T SRAM Bitcell in 14-nm 3-D CoolCube Technology Exploiting Assist Techniques

Reda Boumchedda , Jean-Philippe Noel , Bastien Giraud , Kaya Can Akyel , Mélanie Brocard , et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017, 25 (8), pp.2296-2306. ⟨10.1109/TVLSI.2017.2688862⟩
Journal articles cea-02193602v1
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SamurAI: a 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15,000x Peak-to-Idle Power Reduction, 207ns Wake-up Time and 1.3TOPS/W ML Efficiency

Ivan Miro-Panades , Benoit Tain , Jean-Frédéric Christmann , David Coriat , Romain Lemaire , et al.
2020 IEEE Symposium on VLSI Circuits, Jun 2020, Honolulu, United States. ⟨10.1109/VLSICircuits18222.2020.9163000⟩
Conference papers hal-03022034v1