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authFullName_s : Jean-Michel Portal
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Implementation of Ternary Weights With Resistive RAM Using a Single Sense Operation per Synapse

Axel Laborieux , Marc Bocquet , Hirtzlin Tifenn , Jacques-Olivier Klein , Etienne Nowak , et al.
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020, pp.1-10. ⟨10.1109/TCSI.2020.3031627⟩
Journal articles hal-02983778v1

In-depth investigation of programming and reading operations in RRAM cells integrated with Ovonic Threshold Switching (OTS) selectors

M. Alayan , E. Vianello , G. Navarro , C. Carabasse , S. La Barbera , et al.
2017 IEEE International Electron Devices Meeting (IEDM), Dec 2017, San Francisco, United States. ⟨10.1109/IEDM.2017.8268311⟩
Conference papers hal-01791221v1
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A Self-referenced and regulated sensing solution for PCM with OTS selector

Julien Gasquez , Bastien Giraud , Philippe Boivin , Yohann Moustapha-Rabault , Vincenzo Della Marca , et al.
IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), 2021, 2021, pp.1-6. ⟨10.1109/VLSI-SoC53125.2021.9606969⟩
Journal articles cea-03605069v1
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Write Termination circuits for RRAM : A Holistic Approach From Technology to Application Considerations

Alexandre Levisse , Marc Bocquet , Marco Rios , Mouhamad Alayan , Mathieu Moreau , et al.
IEEE Access, 2020, pp.109297-109308. ⟨10.1109/ACCESS.2020.3000867⟩
Journal articles hal-02863232v1

FDSOI Floating Body Cell eDRAM Using Gate-Induced Drain-Leakage (GIDL) Write Current for High Speed and Low Power Applications

S. Puget , G. Bossu , C. Fenouillet-Beranger , P. Perreau , P. Masson , et al.
International Memory Workshop IMW), May 2009, Monterey, United States
Conference papers hal-00524918v1
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Digital Biologically Plausible Implementation of Binarized Neural Networks With Differential Hafnium Oxide Resistive Memory Arrays

Tifenn Hirtzlin , Marc Bocquet , Bogdan Penkovsky , Jacques-Olivier Klein , Etienne Nowak , et al.
Frontiers in Neuroscience, 2020, 13, ⟨10.3389/fnins.2019.01383⟩
Journal articles hal-02436382v1
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Switching Event Detection and Self-Termination Programming Circuit for Energy Efficient ReRAM Memory Arrays

M. Alayan , E. Muhr , A. Levisse , Marc Bocquet , M. Moreau , et al.
IEEE Transactions on Circuits and Systems II: Express Briefs, 2019, 66 (5), pp.748-752. ⟨10.1109/TCSII.2019.2908967⟩
Journal articles hal-02158840v1
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Low-Overhead Implementation of Binarized Neural Networks Employing Robust 2T2R Resistive RAM Bridges

M. Ezzadeen , A. Majumdar , Marc Bocquet , B. Giraud , J.-P. Noel , et al.
ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC), Sep 2021, Grenoble, France. pp.83-86, ⟨10.1109/ESSCIRC53450.2021.9567742⟩
Conference papers hal-03597353v1
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1S1R sub-threshold operation in Crossbar Arrays for Neural Networks hardware implementation

Joel Minguet Lopez , Manon Dampfhoffer , Tifenn Hirtzlin , Lucas Reganaz , Laurent Grenouillet , et al.
MIXDES 2023, Jun 2023, CRACOVIE, Poland
Conference papers cea-04161135v1

Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures

Alexandre Levisse , Bastien Giraud , Jean-Philippe Noel , Mathieu Moreau , Jean-Michel Portal
Proceedings of the 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Jul 2016, Beijing, China. pp.7-12, ⟨10.1145/2950067.2950073⟩
Conference papers hal-01435118v1
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Storage class memory with computing row buffer: A design space exploration

Valentin Egloff , Jean-Philippe Noel , Maha Kooli , Bastien Giraud , Lorenzo Ciampolini , et al.
Other publications cea-03605068v1
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Phenomenological modelling of non-volatile memory threshold voltage shift induced by nonlinear ionization with a femtosecond laser

Philippe Chiquet , Maxime Chambonneau , V. Della Marca , Jérémy Postel-Pellerin , Pierre Canet , et al.
Scientific Reports, 2019, 9 (7392), ⟨10.1038/s41598-019-43344-x⟩
Journal articles hal-02137915v1
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Memory-Centric Neuromorphic Computing With Nanodevices

Damien Querlioz , Tifenn Hirtzlin , Jacques-Olivier Klein , Etienne Nowak , Elisa Vianello , et al.
Biomedical Circuits and Systems Conference (BiOCAS), Oct 2019, Nara, Japan. ⟨10.1109/BIOCAS.2019.8919010⟩
Conference papers hal-02399731v1

A Regulated Sensing Solution Based on a Self-reference Principle for PCM + OTS Memory Array

J. Gasquez , B. Giraud , P. Boivin , Y. Moustapha-Rabault , V. Della Marca , et al.
VLSI-SoC: Technology Advancement on SoC Design, 661, Springer Nature Switzerland, pp.225-243, 2022, IFIP Advances in Information and Communication Technology, ⟨10.1007/978-3-031-16818-5_11⟩
Book sections hal-03971060v1
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Embracing the unreliability of memory devices for neuromorphic computing

Marc Bocquet , Tifenn Hirtzlin , Jacques-Olivier Klein , Etienne Nowak , Elisa Vianello , et al.
IRPS 2020 - IEEE International Reliability Physics Symposium, IEEE, Apr 2020, Dallas (Texas), United States. pp.1-5, ⟨10.1109/IRPS45951.2020.9128346⟩
Conference papers hal-04019222v1
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Phase-Change Memory: A Continuous Multilevel Compact Model of Subthreshold Conduction and Threshold Switching

Corentin Pigot , Fabien Gilibert , Marina Reyboz , Marc Bocquet , Paola Zuliani , et al.
Japanese Journal of Applied Physics, In press, 57 (4S), ⟨10.7567/JJAP.57.04FE13⟩
Journal articles hal-01737915v1
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Design and Simulation of a 128 kb Embedded Nonvolatile Memory Based on a Hybrid RRAM (HfO$_2$ )/28 nm FDSOI CMOS Technology

Jean-Michel Portal , Marc Bocquet , Santhosh Onkaraiah , Mathieu Moreau , Hassen Aziza , et al.
IEEE Transactions on Nanotechnology, 2017, 16, pp.677 - 686. ⟨10.1109/TNANO.2017.2703985⟩
Journal articles hal-01745418v1

Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop

M. Nataraj , A. Levisse , B. Giraud , J.P. Noel , P. Meinerzhagen , et al.
2017 IEEE International Symposium on Circuits and Systems (ISCAS), May 2017, Baltimore, United States. ⟨10.1109/ISCAS.2017.8050759⟩
Conference papers hal-01788146v1

Binary OxRAM/CBRAM Memories for Efficient Implementations of Embedded Neuromorphic Circuits

Elisa Vianello , Thilo Werner , Giuseppe Piccolboni , Daniele Garbin , Olivier Bichler , et al.
Neuro-inspired Computing Using Resistive Synaptic Devices, 2017
Book sections hal-01791253v1
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Experimental Demonstration of Multilevel Resistive Random Access Memory Programming for up to Two Months Stable Neural Networks Inference Accuracy

Eduardo Esmanhotto , Tifenn Hirtzlin , Djohan Bonnet , Niccolo Castellani , Jean-Michel Portal , et al.
Advanced Intelligent Systems, 2022, ⟨10.1002/aisy.202200145⟩
Journal articles hal-03861116v1
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Model of the Weak Reset Process in HfO x Resistive Memory for Deep Learning Frameworks

Atreya Majumdar , Marc Bocquet , Tifenn Hirtzlin , Axel Laborieux , Jacques-Olivier Klein , et al.
IEEE Transactions on Electron Devices, 2021, 68 (10), pp.4925-4932. ⟨10.1109/TED.2021.3108479⟩
Journal articles hal-03372056v1
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Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks

T Hirtzlin , Marc Bocquet , J.-O Klein , E. Nowak , E. Vianello , et al.
IEEE International Conference on Artificial Intellignence Circuits and Systems (AICAS), Mar 2019, Hsinshu, Taiwan. ⟨10.1109/AICAS.2019.8771544⟩
Conference papers hal-02159142v1
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Robust Compact Model for Bipolar Oxide-Based Resistive Switching Memories

Marc Bocquet , Damien Deleruyelle , Hassen Aziza , Christophe Muller , Jean-Michel Portal , et al.
IEEE Transactions on Electron Devices, 2014, 61 (3), pp.674 - 681. ⟨10.1109/TED.2013.2296793⟩
Journal articles hal-01737291v1
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In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications

Bogdan Penkovsky , Marc Bocquet , Tifenn Hirtzlin , Jacques-Olivier Klein , Etienne Nowak , et al.
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), Mar 2020, Grenoble, France. pp.690-695, ⟨10.23919/DATE48585.2020.9116439⟩
Conference papers hal-03218970v1
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1S1R Sub-threshold Operation in Crossbar Arrays for Neural Networks Hardware Implementation

Joel Minguet Lopez , Manon Dampfhoffer , Tifenn Hirtzlin , Lucas Reganaz , Laurent Grenouillet , et al.
30th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES ), Jun 2023, Krakow, Poland
Conference papers hal-04155023v2
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Compact Modeling Solutions for Oxide-Based Resistive Switching Memories (OxRAM)

Marc Bocquet , Hassen Aziza , Weisheng Zhao , Yue Zhang , Santhosh Onkaraiah , et al.
Journal of Low Power Electronics and Applications, 2014, 4 (1), pp.1-14. ⟨10.3390/jlpea4010001⟩
Journal articles hal-01737320v1
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Thermal Laser Attack and High Temperature Heating on HfO2-based OxRAM Cells

A Krakovinsky , Marc Bocquet , R Wacquez , J. Coignus , Jean-Michel Portal
International Symposium on On-Line Testing and Robust System Design, Jul 2017, Thessaloniki, Greece
Conference papers hal-01737925v1

RRAM-based FPGA for “Normally Off, Instantly On” applications

Ogun Turkyilmaz , Santhosh Onkaraiah , Marina Reyboz , Fabien Clermidy , H. Hraziia , et al.
Journal of Parallel and Distributed Computing, 2014, 74, pp.2441 - 2451. ⟨10.1016/j.jpdc.2013.08.003⟩
Journal articles hal-01743243v1
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Resistive and spintronic RAMs: device, simulation, and applications

Elena Ioana Vatajelu , Lorena Anghel , Jean-Michel Portal , Marc Bocquet , Guillaume Prenat
IOLTS 2018 - IEEE 24th International Symposium on On-Line Testing And Robust System Design, Jul 2018, Platja d'Aro, Spain. pp.109-114, ⟨10.1109/IOLTS.2018.8474226⟩
Conference papers hal-01976583v1
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OxRAM-Based Non Volatile Flip-Flop in 28nm FDSOI

Natalija Jovanovic , Olivier Thomas , Elisa Vianello , Jean-Michel Portal , Boris Nikolic , et al.
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS), Jun 2014, Trois Rivières, Canada. ⟨10.1109/NEWCAS.2014.6934003⟩
Conference papers hal-02288534v1