Charge Localization During Program and Retention in NROM-like Nonvolatile Memory Devices.
Emmanuel Nowak
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E. Vianello
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L. Perniola
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Marc Bocquet
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G. Molas
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International Conference on Solid State Devices and Materials (SSDM) , 2009, Sendai, Japan
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hal-00604215v1
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LOW TEMPERATURE INVESTIGATION OF ELECTRICAL CONDUCTION IN POLYSILICON: SIMULATION AND EXPERIMENT
S. Ecoffey
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S. Mahapatra
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V. Pott
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D. Bouvet
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G. Reimbold
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ENS 2005 , Dec 2005, Paris, France. pp.51-54
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hal-00166985v1
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Détermination expérimentale de la variation de la masse de conductivité des électrons dans un transistor MOS sous contrainte uniaxiale selon [110]
F. Rochette
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M. Cassé
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M. Mouis
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G. Reimbold
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F. Boulanger
Journées "Simulation et caractérisation des nanocomposants" du GDR Nanoélectronique , 2006, GRENOBLE, France. pp.XX
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hal-00148274v1
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Study of carrier transport in strained and unstrained SOI tri-gate and omega-gate silicon nanowire MOSFETs
M. Koyama
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M. Casse
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R. Coquand
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S. Barraud
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C. Vizioz
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Journal articles
hal-01002176v1
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Influence of epitaxy and gate deposition process on Ron resistance of AlGaN/GaN-on-Si HEMT
J. Lehmann
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C. Leroux
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M. Charles
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A. Torres
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2015 27th IEEE International Symposium on Power Semiconductor Devices & IC's (ISPSD) , May 2015, Hong Kong, China. pp.261-264,
⟨10.1109/ISPSD.2015.7123439⟩
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hal-02009897v1
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Transport in TriGate nanowire FET: Cross-section effect at the nanometer scale
J. Pelloux-Prayer
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M. Cassé
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S. Barraud
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F. Triozon
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Z. Zeng
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2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) , Oct 2016, Burlingame, France. pp.1-2
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hal-02143469v1
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A new gate pattern measurement for evaluating the BTI degradation in circuit conditions
A. Subirats
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X. Garros
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J. Cluzel
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J. El Husseini
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2014 IEEE International Reliability Physics Symposium (IRPS) , Jun 2014, Waikoloa, United States. pp.5D.1.1-5D.1.5,
⟨10.1109/IRPS.2014.6860670⟩
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hal-02049034v1
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Effective work function modulation by $sacrificial$ gate aluminum diffusion on HfON-based 14nm NMOS devices
C. Suarez-Segovia
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C. Leroux
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P. Caubet
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F. Domengie
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G. Reimbold
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hal-01947661v1
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Comparison of RTN and TDDS methods for trap extraction in trigate nanowires
A. Tsiara
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X. Garros
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A. Vernhet
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S. Barraud
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2017 IEEE International Reliability Physics Symposium (IRPS) , Apr 2017, Monterey, United States. pp.3E-4.1-3E-4.6,
⟨10.1109/IRPS.2017.7936297⟩
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hal-02050205v1
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A microsecond time resolved current collapse test setup dedicated to GaN-based Schottky diode characterization
T. Lorin
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W. van den Daele
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C. Gillot
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M. Charles
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J. Biscarrat
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2017 International Conference of Microelectronic Test Structures (ICMTS) , Mar 2017, Grenoble, France. pp.150-153,
⟨10.1109/ICMTS.2017.7954286⟩
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hal-02050207v1
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Strain-Enhanced Performance of Si-Nanowire FETs
S. Barraud
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R. Coquand
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M. Koyamad
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D. Cooper
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ECS Transactions , 2013, 53, pp.125-136
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hal-00994254v1
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Reliability of ultra-thin buried oxides for multi-VT FDSOI technology
G. Besnard
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X. Garros
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P. Nguyen
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F. Andrieu
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P. Reynaud
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Journal articles
hal-02002976v1
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Investigation of hot carrier reliability of SOI and strained SOI transistors using back bias
G. Besnard
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X. Garros
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A. Subirats
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F. Andrieu
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X. Federspiel
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hal-02008449v1
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DLTS study of extended defects in HgCdTe photodiodes
P. Guinedor
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T. Broult
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A. Brunner
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L. Rubaldo
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19th International Conference on Extended Defects in Semiconductors (EDS) , eds2016.sciencesconf.org, Jun 2018, Thessaloniki, Greece
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hal-02016057v1
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Sheet resistance measurement on AlGaN/GaN wafers and dispersion study
J. Lehmann
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Cédric Leroux
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M. Charles
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A. Torres
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E. Morvan
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INFOS 2013 , Jun 2013, Cracow, Poland. pp.P.14
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hal-01074271v1
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Study of the piezoresistive properties of NMOS and PMOS Ω-gate SOI nanowire transistors: Scalability effects and high stress level
J. Pelloux-Prayer
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M. Cassé
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S. Barraud
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P. Nguyen
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2014 IEEE International Electron Devices Meeting (IEDM) , Dec 2014, San Francisco, France. pp.20.5.1-20.5.4
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hal-02138872v1
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Full front and back split C-V characterization of CMOS devices from 14nm node FDSOI technology
B. Mohamad
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G. Ghibaudo
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C. Leroux
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E. Josse
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G. Reimbold
2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) , Oct 2015, Rohnert Park, United States. pp.9a.4,
⟨10.1109/S3S.2015.7333546⟩
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hal-02049810v1
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Strain effect on mobility in nanowire MOSFETs down to 10 nm width: Geometrical effects and piezoresistive model
Johan Pelloux-Prayer
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Mikael Casse
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Francois Triozon
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Sylvain Barraud
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Yann-Michel Niquet
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cea-01851576v1
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On the electrical variability of resistive-switching memory devices based on NiO oxide
S Tirano
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Marc Bocquet
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Christophe Muller
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D. Deleruyelle
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L. Perniola
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2011 IEEE 42nd Semiconductor Interface Specialists Conference (SISC) , Dec 2011, Arlington, United States
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hal-01745633v1
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Self-heating assessment and cold current extraction in FDSOI MOSFETs
K. Triantopoulos
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M. Cassé
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L. Brunet
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P. Batude
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C. Fenouillet-Beranger
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2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) , Oct 2017, Burlingame, United States. pp.6.4,
⟨10.1109/S3S.2017.8309239⟩
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hal-02050233v1
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Performance and reliability of strained SOI transistors for advanced planar FDSOI technology
G. Besnard
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X. Garros
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A. Subirats
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F. Andrieu
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X. Federspiel
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2015 IEEE International Reliability Physics Symposium (IRPS) , Apr 2015, Monterey, United States. pp.2F.1.1-2F.1.5,
⟨10.1109/IRPS.2015.7112691⟩
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hal-02004106v1
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Impact Of Single Charge Trapping On The Variability of Ultra-Scaled Planar And Tri-Gate FDSOI MOSFETs: Experiment vs Simulation
A. Subirats
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X. Garros
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J. El Husseini
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C. Le Royer
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IEEE Transactions on Electron Devices , 2013, 60, pp.2604-2610
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hal-01018674v1
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An attempt to explain thermally induced soft failures during low level ESD stresses: study of the differences between soft and hard NMOS failures
P. Salome
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Cédric Leroux
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D. Mariolle
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D. Lafond
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Microelectronics Reliability , 1998, 38 (11), pp.1763-1772
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hal-00141557v1
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Defects study in IR SWIR HgCdTe photodetectors using DLTS
A. Brunner
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L. Rubaldo
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J. Berthoz
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D. Bauza
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G. Reimbold
Conference papers
hal-02017248v1
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Impact of dynamic variability on SRAM functionality and performance in nanoscaled CMOS technologies.
A. Subirats
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X. Garros
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J. Mazurier
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J. El Husseini
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hal-01074529v1
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Hot carrier degradation in nanowire transistors: Physical mechanisms, width dependence and impact of Self-Heating
A. Laurent
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X. Garros
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S. Barraud
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G. Mariniello
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G. Reimbold
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hal-02050194v1
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Thermal effects in 3D sequential technology
K. Triantopoulos
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M. Cassé
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L. Brunet
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P. Batude
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C. Fenouillet-Beranger
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2017 IEEE International Electron Devices Meeting (IEDM) , Dec 2017, San Francisco, United States. pp.7.6.1-7.6.4,
⟨10.1109/IEDM.2017.8268348⟩
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hal-02050229v1
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N-doped GeTe as performance booster for embedded phase-change memories
A. Fantini
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V. Sousa
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L. Perniola
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E. Gourvest
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J.C. Bastien
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Proc. 2010 IEEE International Electron Devices Meeting (IEDM) , 2010, San Francisco, United States
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hal-00625213v1
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Investigation of new chalcogenide materials to improve the PCM performance
V. Sousa
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L. Perniola
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G. Navarro
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N. Pashkov
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M. Suri
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2011 SIMIT, 11th Non-volatile memory technology symposium , Nov 2011, Shangai, China
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hal-00669545v1
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Characterization and modeling of 2DEG mobility in AlGaN/AlN/GaN MIS-HEMT
I. Nifa
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C. Leroux
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A. Torrès
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M. Charles
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G. Reimbold
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hal-02145457v1
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