Filter your results
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
|
|
sorted by
|
|
Sub-20 nm multilayer nanopillar patterning for hybrid SET/CMOS integrationMicro and Nano Engineering, 2020, 9, https://doi.org/10.1016/j.mne.2020.100074. ⟨10.1016/j.mne.2020.100074⟩
Journal articles
cea-03409432v1
|