Design and Simulation of a 128 kb Embedded Nonvolatile Memory Based on a Hybrid RRAM (HfO$_2$ )/28 nm FDSOI CMOS Technology
Jean-Michel Portal
,
Marc Bocquet
,
Santhosh Onkaraiah
,
Mathieu Moreau
,
Hassen Aziza
,
et al.
Journal articles
hal-01745418v1
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RISC V based programming model of a computational SRAM vector processing unit
Maha Kooli
,
Henri-Pierre Charles
,
Thaddée Bricout
,
Jean-Philippe Noel
,
Maria Ramirez-Corrales
,
et al.
RiscV Summit Europe 2023 , Jun 2023, Barcelone, Spain.
, 2023
Conference poster
cea-04196778v1
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DRC 2 : Dynamically Reconfigurable Computing Circuit based on Memory Architecture
Kaya Can Akyel
,
Henri-Pierre Charles
,
Julien Mottin
,
Bastien Giraud
,
Suraci Grégory
,
et al.
IEEE International Conference on Rebooting Computing , Oct 2016, San Diego, France
Conference papers
cea-01376554v1
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Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures
Alexandre Levisse
,
Bastien Giraud
,
Jean-Philippe Noel
,
Mathieu Moreau
,
Jean-Michel Portal
Proceedings of the 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) , Jul 2016, Beijing, China. pp.7-12,
⟨10.1145/2950067.2950073⟩
Conference papers
hal-01435118v1
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Storage class memory with computing row buffer: A design space exploration
Valentin Egloff
,
Jean-Philippe Noel
,
Maha Kooli
,
Bastien Giraud
,
Lorenzo Ciampolini
,
et al.
Other publications
cea-03605068v1
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Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization
Roman Gauchi
,
Valentin Egloff
,
Maha Kooli
,
Jean-Philippe Noel
,
Bastien Giraud
,
et al.
ISLPED 2020: ACM/IEEE International Symposium on Low Power Electronics and Design , Aug 2020, Boston, MA, United States. pp.121-126,
⟨10.1145/3370748.3406550⟩
Conference papers
cea-02963719v1
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Thermal Effects of Silicon Thickness in 3-D ICs: Measurements and Simulations
Papa Momar Souare
,
Vincent Fiori
,
Alexis Farcy
,
François de Crécy
,
Haykel Ben Jamaa
,
et al.
IEEE Transactions on Components, Packaging and Manufacturing Technology. Part A, Manufacturing Technology , 2014, 4 (8), pp.1284-1292.
⟨10.1109/TCPMT.2014.2327654⟩
Journal articles
emse-01498657v1
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Smart Instruction Codes for In-Memory Computing Architectures Compatible with Standard SRAM Interfaces
Maha Kooli
,
Henri-Pierre Charles
,
Clément Touzet
,
Bastien Giraud
,
Jean-Philippe Noel
Design, Automation and Test in Europe , Mar 2018, Dresde, Germany
Conference papers
cea-01757656v1
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Prospects for energy-efficient edge computing with integrated HfO 2-based ferroelectric devices
Ian O'Connor
,
Mayeul Cantan
,
Cedric Marchand
,
Bertrand Vilquin
,
Bastien Giraud
,
et al.
Conference papers
hal-01916992v1
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A Self-referenced and regulated sensing solution for PCM with OTS selector
Julien Gasquez
,
Bastien Giraud
,
Philippe Boivin
,
Yohann Moustapha-Rabault
,
Vincenzo Della Marca
,
et al.
Journal articles
cea-03605069v1
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Towards a truly integrated vector processing unit for memory-bound applications based on a cost-competitive computational SRAM design solution
Maha Kooli
,
Antoine Heraud
,
Henri-Pierre Charles
,
Bastien Giraud
,
Roman Gauchi
,
et al.
ACM Journal on Emerging Technologies in Computing Systems , 2022, 18 (2), pp.1-26.
⟨10.1145/3485823⟩
Journal articles
cea-04129882v1
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Resistive Switching Memory Architecture Based on Polarity Controllable Selectors
Alexandre Levisse
,
Pierre-Emmanuel Gaillardon
,
Bastien Giraud
,
Ian O'Connor
,
Jean-Philippe Noel
,
et al.
Journal articles
hal-02060199v1
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Smart Instruction Codes For In-Memory Computing Architectures Compatible With Standard Sram Interfaces
Henri-Pierre Charles
,
Maha Kooli
,
Clément Touzet
,
Bastien Giraud
,
Jean-Philippe Noel
2018
Other publications
cea-01757665v1
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A 35.6 TOPS/W/mm2 3-Stage Pipelined Computational SRAM With Adjustable Form Factor for Highly Data-Centric Applications
Jean-Philippe Noel Noel
,
Manuel Pezzin
,
Roman Gauchi
,
Jean-Frédéric Christmann
,
Maha Kooli
,
et al.
Journal articles
cea-03605066v1
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SneakPath compensation circuit for programming and read operations in RRAM-based CrossPoint architectures
Alexandre Levisse
,
Bastien Giraud
,
Jean-Philippe Noel
,
Mathieu Moreau
,
Jean-Michel Portal
Conference papers
hal-01745689v1
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A near-instantaneous and non-invasive erasure design technique to protect sensitive data stored in secure SRAMs
Jean-Philippe Noel
,
Manuel Pezzin
,
Jean-Frédéric Christmann
,
Lorenzo Ciampolini
,
Mikael Le Coadou
,
et al.
Conference papers
cea-03605067v1
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Architecture, design and technology guidelines for crosspoint memories
Alexandre Levisse
,
P. Royer
,
Bastien Giraud
,
J.P. Nöel
,
Mathieu Moreau
,
et al.
2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) , Jul 2017, Newport, United States. pp.677 - 686,
⟨10.1109/NANOARCH.2017.8053733⟩
Conference papers
hal-01788148v1
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Software Platform Dedicated for In-Memory Computing Circuit Evaluation
Maha Kooli
,
Henri-Pierre Charles
,
Clément Touzet
,
Bastien Giraud
,
Jean-Philippe Noel
Conference papers
cea-01625320v1
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Binary linear ECCs optimized for bit inversion in memories with asymmetric error probabilities
Valentin Gherman
,
Samuel Evain
,
Bastien Giraud
Conference papers
cea-03469725v1
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High-Density 4T SRAM Bitcell in 14-nm 3-D CoolCube Technology Exploiting Assist Techniques
Reda Boumchedda
,
Jean-Philippe Noel
,
Bastien Giraud
,
Kaya Can Akyel
,
Mélanie Brocard
,
et al.
Journal articles
cea-02193602v1
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