@article{boncalo:cea-02186481, TITLE = {{Layered LDPC Decoders With Efficient Memory Access Scheduling and Mapping and Built-In Support for Pipeline Hazards Mitigation}}, AUTHOR = {Boncalo, Oana and Kolumban-Antal, Gyorgy and Amaricai, Alexandru and Savin, Valentin and Declercq, David}, URL = {https://cea.hal.science/cea-02186481}, JOURNAL = {{IEEE Transactions on Circuits and Systems I: Regular Papers}}, PUBLISHER = {{IEEE}}, VOLUME = {66}, NUMBER = {4}, PAGES = {1643-1656}, YEAR = {2019}, DOI = {10.1109/TCSI.2018.2884252}, KEYWORDS = {Bank allocation ; graph coloring ; LDPC QC-LDPC ; in-place memory mapping ; pipeline conflicts}, HAL_ID = {cea-02186481}, HAL_VERSION = {v1}, }