We compute the contact resistances R-c in trigate and FinFET devices with widths and heights in the 4-24 nm range using a Non-Equilibrium Green's Functions approach. Electron-phonon, surface roughness, and Coulomb scattering are taken into account. We show that Rc represents a significant part of the total resistance of devices with sub-30 nm gate lengths. The analysis of the quasi-Fermi level profile reveals that the spacers between the heavily doped source/drain and the gate are major contributors to the contact resistance. The conductance is indeed limited by the poor electrostatic control over the carrier density under the spacers. We then disentangle the ballistic and diffusive components of Rc and analyze the impact of different design parameters (cross section and doping profile in the contacts) on the electrical performances of the devices. The contact resistance and variability rapidly increase when the cross sectional area of the channel goes below similar or equal to 50 nm(2). We also highlight the role of the charges trapped at the interface between silicon and the spacer material. (C) 2016 AIP Publishing LLC.